X86C64

3

DEVICE OPERATION

Zilog Z8 operation requires the microcontroller’s

AS, DS

and R/

W outputs tied to the X86C64 AS, DS and

R/

W inputs respectively.

The rising edge of

AS will latch the addresses for both a

read and write operation. The state of R/

W output

determines the operation to be performed, with the

DS

signal acting as a data strobe.

If R/

W is HIGH and CE HIGH (read operation) data will

R/

W is LOW and CE is HIGH (write operation) data

on the LOW to HIGH transition of

DS.

PRINCIPLES OF OPERATION

The X86C64 is a highly integrated peripheral device for

a wide variety of single-chip microcontrollers. The

be used either for Program Storage, Data Storage or a

combination of both in systems based upon Von

Neumann (86XX) architectures. The X86C64 incorpo-

rates the interface circuitry normally needed to decode

the control signals and demultiplex the Address/Data

bus to provide a “ Seamless” interface.

The interface inputs on the X86C64 are configured such

that it is possible to directly connect them to the proper

interface signals of the appropriate single-chip

microcontroller.

The X86C64 is internally organized as two independent

ing which of the two planes of memory are to be

accessed. While the processor is executing code out of

one plane, write operations can take place in the other

plane, allowing the processor to continue execution of

code out of the X86C64 during a byte or page write to the

device.

The X86C64 also features an advanced implementation

of the Software Data Protection scheme, called Block

Protect, which allows the device to be broken into 8

independent sections of 1K bytes. Each of these sec-

tions can be independently enabled for write operations;

thereby allowing certain sections of the device to be

secured so that updates can only occur in a controlled

environment (e.g. in an automotive application, only at

an authorized service center). The desired set-up con-

figuration is stored in a nonvolatile register, ensuring the

configuration data will be maintained after the device is

powered down.

The X86C64 also features a Write Control input (

WC),

which serves as an external control over the completion

of a previously initiated page load cycle.

The X86C64 also features the industry standard 5-volt

and toggle-bit polling.

Typical Application

P10

P11

P12

P13

P14

P15

P16

P17

P00

P01

P02

P03

P04

P07

AS

DS

R/W

21

22

23

24

25

26

27

28

13

14

15

16

17

20

9

8

7

7

8

9

10

11

13

14

15

21

20

17

19

2

16

5

22

18

23

6

A/D0

A/D1

A/D2

A/D3

A/D4

A/D5

A/D6

A/D7

A8

A9

A10

A11

A12

CE

WC

AS

DS

R/W

SEL

VCC

24

XTAL

EXTAL

2

3

X86C64

Z8

VSS

12

3819 FHD F03