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CS5451A bảng dữ liệu(PDF) 6 Page - Cirrus Logic |
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CS5451A bảng dữ liệu(HTML) 6 Page - Cirrus Logic |
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6 / 14 page ![]() CS5451A 6 DS635F3 SWITCHING CHARACTERISTICS • Min/Max characteristics and specifications are guaranteed over all Operating Conditions. • Typical characteristics and specifications are measured at nominal supply voltages and TA = 25 °C. • VA+ = VD+ = 3 V ±10%; VA- = -2 V ±10%; AGND = DGND = 0 V. All voltages with respect to 0 V. • Logic Levels: Logic 0 = 0 V, Logic 1 = VD+ Notes: 6. Specified using 10% and 90% points on wave-form of interest. Output loaded with 50 pF. 7. Device parameters are specified with XIN = 4.096 MHz. 8. Device parameters are specified with OWRS = 1. 9. After SE is asserted, the states of SDO and SCLK are FSO is undefined. Parameter Symbol Min Typ Max Unit Rise Times Any Digital Input (except XIN) (Note 6) XIN only Any Digital Output trise - - - - - 50 1.0 10 - µs ns ns Fall Times Any Digital Input (except XIN) (Note 6) XIN only Any Digital Output tfall - - - - - 50 1.0 10 - µs ns ns Serial Port Timing Serial Clock Frequency OWRS = “0” (Note 7) OWRS = “1” SCLK SCLK - - 500 1000 - - kHz kHz Serial Clock Pulse Width High (Note 7 and 8) Pulse Width Low t1 t2 - - 0.5 0.5 - - SCLK SCLK SCLK falling to New Data Bit t3 - - 50 ns FSO Falling to SCLK Rising Delay (Note 7 & 8) t4 -0.5 - SCLK FSO Pulse Width (Note 7 & 8) t5 -1 - SCLK SE Rising to Output Enabled (Note 9) t6 - - 50 ns SE Falling to Output in Tri-state t7 - - 50 ns t 7 t 2 t 1 t 3 4 t 5 t MSB(V1) MSB(V1) - 1 LSB(I3) SE 6 t SDO SCLK FSO Figure 1. Serial Port Timing |
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