CS43L22 datasheet(9/66 Pages) CIRRUS

9 / 66 page

DS792F2

CS43L22

Confidential Draft

3/4/10

2. TYPICAL CONNECTION DIAGRAM

Note 3

Note 2

Note 1

1 µF

+1.8 V to +2.5 V

0.1 µF

1 µF

DGND

0.1 µF

+1.8 V to +3.3 V

SCL

SDA

RESET

2 k

LRCK

Digital Audio

Processor

MCLK

SCLK

SDIN

CS43L22

2 k

+1.8 V to +2.5 V

HP/LINE_OUTB

HP/LINE_OUTA

AIN1A

Left 1

100 k

100

AIN1B

Right 1

0.1 µF

Headphone Out

Left & Right

Line Level Out

Left & Right

FLYP

FLYN

-VHPFILT

51.1

0.022 µF

100 k

100

SPKR_OUTA+

SPKR_OUTA-

SPKR/HP

51.1

0.022 µF

1 µF

0.1 µF

+VHP

1 µF

AGND

* Capacitors must be C0G or equivalent

1 µF

See Note 4

SPKR_OUTB+

SPKR_OUTB-

1 µF

+1.6 V to

+5 V

Stereo Speakers

AIN2A

Left 2

100 k

100

AIN2B

Right 2

100 k

100

1 µF

0.1 µF

Analog

Input 1

Analog

Input 2

10 µF

47 k

Notes:

1. Recommended values for the default charge pump switching

frequency. The required capacitance follows an inverse

relationship with the charge pump’s switching frequency. When

increasing the switching frequency, the capacitance may

decrease; when lowering the switching frequency, the

capacitance must increase.

2. Larger capacitance reduces the ripple on the internal

amplifier’s supply. This may reduce the distortion at higher

output power levels.

3. Additional bulk capacitance may be added to improve PSRR

at low frequencies.

4. Series resistance in the path of the power supplies must be

avoided. Any voltage drop on VHP will directly impact the

negative charge pump supply (-VHPFILT) and clip the audio

output.

AIN3A

Left 3

100 k

100

AIN3B

Right 3

100 k

100

1 µF

Analog

Input 3

AIN4A

Left 4

100 k

100

AIN4B

Right 4

100 k

100

1 µF

Analog

Input 4

FILT+

10 µF

150 pF

AFILTA

AFILTB

** Low ESR, X7R/X5R dielectric capacitors.

TSTO

AD0

Figure 1. Typical Connection Diagram

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