Technical Note

BU4015B,BU4015BF,BU4021B,BU4021BF,

BU4094BC,BU4094BCF,BU4094BCFV,BU4538B,BU4028B

12/17

www.rohm.com

2009.06 - Rev.A

© 2009 ROHM Co., Ltd. All rights reserved.

0

10

20

30

40

50

0

5

10

15

20

Output Voltage [V]

●

Reference data(BU4028B)

(*) Switching characteristics is shown in P15.

●

Description of BU4015B series model

Function：Dual 4-bit static shift register

1) Description of operation

Dual 4-bit static shift register of BU4015B is configured with 2 independent serial input/parallel output registers of the same 4-state.

Each register is provided with an independent clock and reset input having one series data input. Register state is the D

type master/slave flip-flop. Data is shifted to the next stage during the rise time of the clock. Each register can be cleared

by addition of “H” level to reset.

PIN arrangement

Block diagram

Truth table

PIN description

PIN No.

Symbol

I/O

Function

1

CLOCKB

I

Clock input (CHB)

2

Q3B

O

Output 3 (CHB)

3

Q2A

O

Output 2 (CHA)

4

Q1A

O

Output 1 (CHB)

5

Q0A

O

Output 0 (CHA)

6

RESETA

I

Reset input (CHA)

7

DA

I

Data input (CHA)

8

VSS

―

Power supply(-)

9

CLOCKA

I

Clock input (CHA)

10

Q3A

O

Output 3 (CHA)

11

Q2B

O

Output 2 (CHB)

12

Q1B

O

Output 1 (CHB)

13

Q0B

O

Output 0 (CHB)

14

RESETB

I

Reset input (CHB)

15

DB

I

Data input (CHB)

16

VDD

―

Power supply(+)

0

50

100

150

200

250

300

350

400

-50

-25

0

25

50

75

100

Ambient Temperature [℃]

0

50

100

150

200

250

300

350

400

-50

-25

0

25

50

75

100

Ambient Temperature [℃]

Fig.42 Propagation delay tTLH

Fig.43 Propagation delay tTHL

VDD=3[V]

VDD=5[V]

VDD=16[V]

VDD=10[V]

0

100

200

300

400

500

-50

-25

0

25

50

75

100

Ambient Temperature [℃]

0

100

200

300

400

500

-50

-25

0

25

50

75

100

Ambient Temperature [℃]

Fig.44 Propagation delay tPLH

Fig.45 Propagation delay tPHL

VDD=3[V]

VDD=3[V]

VDD=5[V]

VDD=5[V]

VDD=10[V]

VDD=16[V]

VDD=16[V]

VDD=10[V]

0

10

20

30

40

50

0

5

10

15

20

Output Voltage [V]

-40[℃]

25[℃]

85[℃]

-40[℃]

25[℃]

85[℃]

Fig.41 Output sink

current－voltage

Fig.40 Output source

current－voltage

-40[℃]

25[℃]

-40[℃]

25[℃]

85[℃]

85[℃]

-40[℃]

25[℃]

85[℃]

-40[℃]

85[℃]

25[℃]

VDD=3[V]

VDD=5[V]

VDD=16[V]

VDD=10[V]

[BU4028B]

[BU4028B]

VDD=10[V]

VDD=15[V]

VDD=5[V]

VDD=10[V]

VDD=15[V]

VDD=5[V]

Operating Temperature Range

Operating Voltage Range

Operating Temperature Range

Operating Temperature Range

[BU4028B]

[BU4028B]

[BU4028B]

[BU4028B]

D

CL

R

Q

Q

D

CL

R

Q

Q

D

CL

R

Q

Q

D

CL

R

Q

Q

D

CLOCK

RESET

Q0

Q1

Q2

Q3

CLOCK

D

RESET

Q0

Q1

Q2

Q3

XX

H

L

L

L

L

No Change

L

X

H

LL

L

L

LQ0

H

Q1

Q2

Q0

Q1

Q2

X：Don't Care

1

2

4

5

6

7

14

13

12

9

CLOCK B

Q0B

Q2B

Q3A

CLOCK A

Q1B

11

3

10

RESET B

Q3B

Q2B

Q1A

Q0A

RESET A

DA

8

VSS

15

D8

16

VDD

CL

R

D

Q3 Q2 Q1 Q0

CL

R

D

Q0 Q1 Q2 Q3