WM5615IP datasheet(5/12 Pages) WOLFSON

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WM5615

Wolfson Microelectronics

Setup time, DIN before SCLK high

tsu (DS)

Hold time, DIN valid after SCLK high

th (DH)

Setup time, CS low to SCLK high

tsu (CSS)

Setup time CS high to SCLK high

tsu (CS1)

Hold time, SCLK low to CS low

th (CSHO)

Hold time, SCLK low to CS high

th (CSHI)

Pulse duration, min. chip select pulse width height

tw(CS)

Pulse duration, SCLK low

tw (CL)

Pulse duration, SCLK high

tw (CH)

Output Switching Specification

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Output slew rate

CL = 100pF RL = 10 k

Ω

0.3

0.5

µs

TA = 25oC

Output settling time

TO 0.5 LSB CL = 100pF

12.5

µs

RL = 2k

Ω (see note 9)

Glitch energy

DIN = All 0s to all 1s

. s

Signal to noise + distortion

S/(N+D)

Vref = 2Vpp at 1kHz +

2.048 V DC, code 512

Note 9:

Settling time is the time for the output signal to remain within 0.5 LSB of the final measured value for a digital

input code change from code zero to 1023 rising and 1023 to 64 falling.

Digital Input Timing Specifications

Electrical Characteristics (continued)

VDD = 5.0V ±5%, Vref = 2.048V unless otherwise stated.

Analogue Output Dynamic Performance

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNIT

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNIT

Propagation delay time

tpd (DOUT)

CL = 50pF

Reference feedthrough

Input code = 00

-80

(see note 10)

Reference input bandwidth

Input code = 512

100

kHz

(see note 10)

Note 10: Reference feedthrough and bandwidth are measured at the DAC output with Vref input = 2Vpp at 1kHz +

2.048V DC

reference input (REFIN)

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNIT

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