The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high, Normally Non-inverting.

Microsemi’s products are covered by one or more of U.S. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583

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DRF100

The Test Circuit illustrated above was used to evaluate the DRF100 (available as an evaluation Board DRF100 / EVALSW.) The input control

signal is applied to the DRF100 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal

ground currents.

The +V

for this function must be capable of supporting the RMS currents and frequency of the gate load.

Figure 2, DRF100 Test Circuit

FN (pin 3)*

IN (pin 4)*

Function

OUTPUT

HIGH

HIGH

Non-Invert

HIGH

HIGH

LOW

Non-Invert

LOW

LOW

HIGH

Inverting

LOW

LOW

LOW

Inverting

HIGH