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PAC7311CS bảng dữ liệu(PDF) 2 Page - Pixart Imaging Inc.

tên linh kiện PAC7311CS
Giải thích chi tiết về linh kiện  VGA PC Camera Single-Chip
PDF  13 Pages
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nhà sản xuất  PIXART [Pixart Imaging Inc.]
Trang chủ  http://www.pixart.com.tw
Logo PIXART - Pixart Imaging Inc.

PAC7311CS bảng dữ liệu(HTML) 2 Page - Pixart Imaging Inc.

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PixArt Imaging Inc.
PAC7311
VGA PC Camera Single-Chip
All rights strictly reserved any portion in this paper shall not be reproduced, copied or transformed to any other forms without permission
.
2
PixArt Imaging Inc.
E-mail: fae_service@pixart.com.tw
V1.5 Oct. 2005
1. Pin Assignment
1.1PLCCPackage
Pin# Name
Type
Description
1 NC
-
No Connection
2 NC
-
No Connection
3 NC
-
No Connection
4 VRB
BYPASS Analog voltage reference
5 VCM
BYPASS Analog voltage reference
6 NC
-
No Connection
7 NC
-
No Connection
8 VRT
BYPASS Analog voltage reference
9 VDDA
BYPASS Analog power for AD/DA/PGA, 2.5V
10 VDDAY
BYPASS Sensor reset power reference
11 EPR_DO
IN
Data output of EEPROM
12 VSSQ
GND
Ground for I/O and PHY
13 VDDQ
BYPASS Power for I/O and PHY
14 EPR_CS/TR2 OUT
Chip Select of EEPROM; (IO trap pin for PID2, internal pull-down 100Kohm)
15 EPR_CK/TR3 OUT
Serial clock of EEPROM; (IO trap pin for PID3, internal pull-down 100Kohm)
16 EPR_DI/TR1
OUT
Data input of EEPROM; (IO trap pin for PID1, internal pull-down 100Kohm)
17 VSSAY
GND
Sensor ground
18 NC
-
No Connection
19 NC
-
No Connection
20 GPO/TR0
OUT
General purpose output; (IO trap pin for PID0, internal pull-down 100Kohm)
21 LED
OUT
LED driver
22 NC
-
No Connection
23 VSSQ
GND
Ground for I/O and PHY
24 EPR_EN
IN
Enable signal of EEPROM (1: enable, 0: disable), internal pull-down 100Kohm
25 IOTRAP#
IN
I/O trap enable signal (0: enable, 1: disable, internal pull-down 100Kohm)
26 KEY#
IN
Snapshot control signal (Active Low, internal pull-up 100Kohm)
27 NC
-
No Connection
28 VSSQ
GND
Ground for I/O and PHY
29 VDDD
BYPASS Logic power for mixed-mode circuit, 2.5V
30 PWR_5V
PWR
Main power, USB bus power
31 NC
-
No Connection
32 VDDQ
BYPASS Power for I/O and PHY, 3.3V
33 GPIO
IO
General purpose input/output, internal pull-down 100Kohm
34 TEST
IN
Test pin. Connect to GND in normal operation mode
35 NC
-
No Connection
36 RESET#
IN
Chip power up reset
37 VSSQ
GND
Ground for I/O and PHY
38 XOUT
OUT
Crystal output
39 XIN
IN
Crystal input
40 DP
I/O
DP for USB1.1 PHY
41 DN
I/O
DN for USB1.1 PHY
42 NC
-
No Connection
43 VDDQ
BYPASS Power for I/O and PHY
44 VDDP
BYPASS Analog power for PLL
45 VDDAD
BYPASS Analog voltage reference power for core logic, 2.5V
46 VDDAV
BYPASS Analog voltage reference
47 VSSA
GND
Analog ground
48 PWR_5V
PWR
Main power, USB bus power



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