74ABT821_3

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Product data sheet

Rev. 03 — 25 February 2010

8 of 16

NXP Semiconductors

74ABT821

10-bit D-type flip-flop; positive-edge trigger; 3-state

Fig 6.

3-state output (Qn) enable and disable times

The shaded areas indicate when the input is permitted to change for predictable output

performance.

Fig 7.

Set-up and hold times data input (Dn) to clock (CP)

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outputs

disabled

outputs

enabled

outputs

enabled

output

LOW-to-OFF

OFF-to-LOW

output

HIGH-to-OFF

OFF-to-HIGH

OE input

3.5 V

GND

GND

001aac738

CP input

Dn input

GND

GND