LTC4010CFE datasheet(12/24 Pages) LINER

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LTC4010

4010fb

Figure 2. LTC4010 PWM Control Loop

ITH

IPROG

PWM CLOCK

BAT

SENSE

RSENSE

BGATE

TGATE

LTC4010

VCC

4010 F02

operaTion (Refer to Figure 1)

Status Outputs

The LTC4010 open-drain status outputs provide valuable

information about the IC’s operating state and can be

used for a variety of purposes in applications. Table 1

summarizes the state of the three status outputs and the

VCDIV pin as a function of LTC4010 operation. The status

outputscandirectlydrivecurrent-limitedLEDsterminated

to the DC input. The VCDIV column in Table 1 is strictly

informational. VCDIV should only be used to terminate the

VCELL resistor divider, as previously discussed.

Table 1. LTC4010 Status Pins

READY

FAULT

CHRG

VCDIV

CHARGER STATE

Off

Ready to Charge

(VTEMP Held Low)

or Automatic Recharge

Off

Precharge, Fast or Top Off

Charge (May be Paused)

On or Off

Temperature Limits

Exceeded

Off

Fault State (Latched)

PWM Current Source Controller

An integral part of the LTC4010 is the PWM current source

controller. The charger uses a synchronous step-down

architecturetoproducehighefficiencyandlimitedthermal

dissipation. The nominal operating frequency of 550kHz

allows use of a smaller external inductor. The TGATE and

BGATE outputs have internally clamped voltage swings.

They source peak currents tailored to smaller surface-

mountpowerFETslikelytoappearinapplicationsproviding

an average charge current of 3A or less. During the various

charging states, the LTC4010 uses the PWM controller to

regulate an average voltage between SENSE and BAT that

ranges from 10mV to 100mV.

A conceptual diagram of the LTC4010 PWM control loop

is shown in Figure 2.

The voltage across the external current programming

resistor RSENSE is averaged by integrating error amplifier

EA. An internal programming current is also pulled from

input resistor R1. The IPROG • R1 product establishes the

desired average voltage drop across RSENSE, and hence,

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