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AS13986 bảng dữ liệu(PDF) 8 Page - ams AG |
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AS13986 bảng dữ liệu(HTML) 8 Page - ams AG |
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8 / 13 page ![]() www.austriamicrosystems.com Revision 1.02 8 - 13 AS13986 Datasheet - D e t a i l e d D e s c r i p t i o n 8 Detailed Description Regulator On/Off Operation The AS13986 outputs (VOUT1 and VOUT2) are enabled by pulling the corresponding ENx pin high (1.4V) and disabled by pulling the ENx pin low (0V). For reliable operation, the signal source used to drive the ENx input must be capable of swinging above and below the specified turn-on/off voltage thresholds listed in Table 3 on page 4 (Enable Input Logic Low and Enable Input Logic High parameters). Note: Reliable enable/disable operation of VOUT1 and VOUT2 is guaranteed by driving the ENx pins with tR and tF = 10ms. Fast Turn-On Time In normal operation, the AS13986 outputs are turned on when VREF reaches its regulated value (1.23V nominal). Turn- on time is decreased by charging the capacitor at pin BYPASS with the internal 70µA current source. The current source is turned off when the bandgap voltage reaches approximately 95% of its regulated value. Turn-on time is determined by the time constant of the bypass capacitor; smaller capacitor values decrease turn-on time, although noise reduction decreases as well. Therefore, turn-on time and noise reduction must be taken into con- sideration when choosing the value of the bypass capacitor. |
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