PIC18F85J90 datasheet(56/416 Pages) MICROCHIP

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PIC18F85J90 FAMILY

DS39770C-page 56

 2010 Microchip Technology Inc.

5.7

Reset State of Registers

Most registers are unaffected by a Reset. Their status

is unknown on POR and unchanged by all other

Resets. The other registers are forced to a “Reset

state” depending on the type of Reset that occurred.

Most registers are not affected by a WDT wake-up,

since this is viewed as the resumption of normal

operation. Status bits from the RCON register, CM, RI,

TO, PD, POR and BOR, are set or cleared differently in

different Reset situations, as indicated in Table 5-1.

These bits are used in software to determine the nature

of the Reset.

Table 5-2 describes the Reset states for all of the

Special Function Registers. These are categorized by

Power-on and Brown-out Resets, Master Clear and

WDT Resets and WDT wake-ups.

TABLE 5-1:

STATUS BITS, THEIR SIGNIFICANCE AND THE INITIALIZATION CONDITION FOR

RCON REGISTER

Condition

Program

Counter(1)

RCON Register

STKPTR Register

POR

BOR

STKFUL STKUNF

Power-on Reset

0000h

110

RESET

Instruction

0000h

uuu

Brown-out Reset

0000h

11u

MCLR during

power-managed Run

modes

0000h

1uu

MCLR during power-

managed Idle modes and

Sleep mode

0000h

10u

WDT time-out during full

power or power-managed

Run modes

0000h

0uu

MCLR during full-power

execution

0000h

uuu

Stack Full Reset

(STVREN = 1)

0000h

uuu

Stack Underflow Reset

(STVREN = 1)

0000h

uuu

Stack Underflow Error (not

an actual Reset,

STVREN = 0)

0000h

uuu

WDT time-out during

power-managed Idle or

Sleep modes

PC + 2

00u

Interrupt exit from

power-managed modes

PC + 2

u0u

Legend: u = unchanged

Note 1:

When the wake-up is due to an interrupt and the GIEH or GIEL bit is set, the PC is loaded with the

interrupt vector (0008h or 0018h).

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