ST7669 datasheet(43/216 Pages) SITRONIX

43 / 216 page

ST7669

Ver 1.3a

43/216

3/2/2009

7.4 GRAY-SCALE DISPLAY

ST7669 incorporates a 4FRC & 31 PWM function circuit to display a 64 gray-scale display.

7.5 OSCILLATION CIRCUIT

This is on-chip oscillator without external resistor. When the internal oscillator is used, CLS must connect to VDD; when the

external oscillator is used, CL could be input pin. This oscillator signal is used in the voltage converter and display timing

generation circuit.

7.6 DISPLAY TIMING GENERATOR CIRCUIT

This circuit generates some signals to be used for displaying LCD. The display clock, CL (internal), which is generated by

oscillation clock, generates the clock for the line counter and the signal for the display data latch. The line address of

on-chip RAM is generated in synchronization with the display clock and the display data latch circuit latches the 96-bits

display data in synchronization with the display clock. The display data, which is read to the LCD driver, is completely

independent of the access to the display data RAM from the microprocessor. The display clock generates an LCD AC

signal (M), which enables the LCD driver to make an AC drive waveform, and also generates an internal common timing

signal and start signal to the common driver. The frame signal or the line signal changes the M by setting internal

instruction. Driving waveform and internal timing signal are shown in Figure 7.3-3.

Figure 7.3-3 2-frame AC Driving Waveform (Duty Ratio: 1/162)

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