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MSO8000 bảng dữ liệu(PDF) 6 Page - Agilent(Hewlett-Packard)

tên linh kiện MSO8000
Giải thích chi tiết về linh kiện  FPGA Dynamic Probe for Xilinx
PDF  8 Pages
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nhà sản xuất  HP [Agilent(Hewlett-Packard)]
Trang chủ  http://www.home.agilent.com
Logo HP - Agilent(Hewlett-Packard)

MSO8000 bảng dữ liệu(HTML) 6 Page - Agilent(Hewlett-Packard)

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A quick tour of the application (continued)
Setup complete: Make measurements
Quickly change which signal bank
is routed to the MSO. A single
mouse click tells the LAI core
to switch to the newly specified
signal bank without any impact
to the timing of your design. To
make measurements throughout
your FPGA, change signal banks
as often as needed. With each
new selection of a signal bank,
FPGA Dynamic Probe updates
new signal names from your
design to the MSO. User-definable
signal bank names make it
straight forward to select a part
of your design to measure.
Correlate internal FPGA activity with
external measurements
View internal FPGA activity and
time-correlate internal FPGA
measurements with external
analog and digital events in
the surrounding system. FPGA
Dynamic Probe unlocks the power
of the MSO for system-level debug
with FPGAs.
Make state measurements
with your MSO
MSOs incorporate some logic
analysis state capabilities useful
for making FPGA measurements.
Using pattern trigger, setup a
state trigger on LAI clock output
edge and desired digital pattern.
After acquiring the data, use the
post-processing “State clock”
feature to transform the timing
waveforms into state waveforms.
Valid states are shown and
invalid states are filtered. Any of
the 16 digital channels or any of
the analog channels can be set as
the state clock. Using an analog
channel state clock allows you to
retain all 16 digital channels for
bus measurement.
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