eorex

EM48AM1684LBA

Mar. 2009

www.eorex.com

4. Operative Command Table (Continued)

(Note 7)

Current

State

/CS

/R

/C

/W

Addr.

Command

Action

H

X

X

X

X

DESL

Nop

→ Enter row active after t

DPL

L

H

H

H

X

NOP

Nop

→ Enter row active after t

DPL

L

H

H

L

X

BST

Nop

→ Enter row active after t

DPL

L

H

L

H

BA/CA/A10

READ/READA

Start read, Determine AP

L

H

L

L

BA/CA/A10

WRIT/WRITA

New write, Determine AP

(Note 14)

L

L

H

H

BA/RA

ACT

ILLEGAL

(Note 9)

L

L

H

L

BA, A10

PRE/PALL

ILLEGAL

(Note 9)

L

L

L

H

X

REF/SELF

ILLEGAL

Write

Recovering

L

L

L

L

Op-Code

MRS

ILLEGAL

H

X

X

X

X

DESL

Nop

→ Enter pre-charge after t

DPL

L

H

H

H

X

NOP

Nop

→ Enter pre-charge after t

DPL

L

H

H

L

X

BST

Nop

→ Enter pre-charge after t

DPL

L

H

L

H

BA/CA/A10

READ/READA

ILLEGAL

(Note 9, 14)

L

H

L

L

BA/CA/A10

WRIT/WRITA

ILLEGAL

(Note 9)

L

L

H

H

BA/RA

ACT

ILLEGAL

(Note 9)

L

L

H

L

BA, A10

PRE/PALL

ILLEGAL

L

L

L

H

X

REF/SELF

ILLEGAL

Write

Recovering

with AP

L

L

L

L

Op-Code

MRS

ILLEGAL

H

X

X

X

X

DESL

Nop

→ Enter idle after t

RC

L

H

H

X

X

NOP/BST

Nop

→ Enter idle after t

RC

L

H

L

X

X

READ/WRIT

ILLEGAL

L

L

H

X

X

ACT/PRE/PALL

ILLEGAL

Refreshing

L

L

L

X

X

REF/SELF/MRS

ILLEGAL

H

X

X

X

X

DESL

Nop

L

H

H

H

X

NOP

Nop

L

H

H

L

X

BST

ILLEGAL

L

H

L

X

X

READ/WRIT

ILLEGAL

Mode

Register

Accessing

L

L

X

X

X

ACT/PRE/PALL/

REF/SELF/MRS

ILLEGAL

Remark H = High level, L = Low level, X = High or Low level (Don't care), AP = Auto Pre-charge

Note 7:

All entries assume that CKE was active (High level) during the preceding clock cycle.

Note 8:

If all banks are idle, and CKE is inactive (Low level), SDRAM will enter Power down mode.

All input buffers except CKE will be disabled.

Note 9: Illegal to bank in specified states;

Function may be legal in the bank indicated by Bank Address (BA), depending on the state of

that bank.

Note 10: If all banks are idle, and CKE is inactive (Low level), SDRAM will enter Self refresh mode.

All input buffers except CKE will be disabled.

Note 13: Must satisfy burst interrupt condition.

Note 14: Must satisfy bus contention, bus turn around, and/or write recovery requirements.

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