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MPC8535E bảng dữ liệu(PDF) 39 Page - Freescale Semiconductor, Inc |
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MPC8535E bảng dữ liệu(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 126 page ![]() DUART MPC8535E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 39 2.8 DUART This section describes the DC and AC electrical specifications for the DUART interface of the MPC8535E. 2.8.1 DUART DC Electrical Characteristics Table 22 provides the DC electrical characteristics for the DUART interface. 2.8.2 DUART AC Electrical Specifications Table 23 provides the AC timing parameters for the DUART interface. 2.9 Ethernet: Enhanced Three-Speed Ethernet (eTSEC), MII Management This section provides the AC and DC electrical characteristics for enhanced three-speed and MII management. Table 22. DUART DC Electrical Characteristics Parameter Symbol Min Max Unit High-level input voltage VIH 2OVDD + 0.3 V Low-level input voltage VIL – 0.3 0.8 V Input current (VIN 1 = 0 V or V IN = VDD) IIN —±5 μA High-level output voltage (OVDD = min, IOH = –2 mA) VOH 2.4 — V Low-level output voltage (OVDD = min, IOL = 2 mA) VOL —0.4 V Note: 1. Note that the symbol VIN, in this case, represents the OVIN symbol referenced in Table 1 and Table 2. Table 23. DUART AC Timing Specifications Parameter Value Unit Notes Minimum baud rate CCB clock/1,048,576 baud 2 Maximum baud rate CCB clock/16 baud 2,3 Oversample rate 16 — 4 Notes: 2. CCB clock refers to the platform clock. 3. Actual attainable baud rate will be limited by the latency of interrupt processing. 4. The middle of a start bit is detected as the 8th sampled 0 after the 1-to-0 transition of the start bit. Subsequent bit values are sampled each 16th sample. |
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