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HT82K76E-L bảng dữ liệu(PDF) 8 Page - Holtek Semiconductor Inc

tên linh kiện HT82K76E-L
Giải thích chi tiết về linh kiện  I/O Type 8-Bit OTP MCU
PDF  58 Pages
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nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
Trang chủ  http://www.holtek.com
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HT82K70E-L/HT82K76E-L
Rev. 1.00
8
September 15, 2009
Arithmetic and Logic Unit
- ALU
The arithmetic-logic unit or ALU is a critical area of the
microcontroller that carries out arithmetic and logic op-
erations of the instruction set. Connected to the main
microcontroller data bus, the ALU receives related in-
struction codes and performs the required arithmetic or
logical operations after which the result will be placed in
the specified register. As these ALU calculation or oper-
ations may result in carry, borrow or other status
changes, the status register will be correspondingly up-
dated to reflect these changes. The ALU supports the
following functions:
· Arithmetic operations: ADD, ADDM, ADC, ADCM,
SUB, SUBM, SBC, SBCM, DAA
· Logic operations: AND, OR, XOR, ANDM, ORM,
XORM, CPL, CPLA
· Rotation RRA, RR, RRCA, RRC, RLA, RL, RLCA,
RLC
· Increment and Decrement INCA, INC, DECA, DEC
· Branch decision, JMP, SZ, SZA, SNZ, SIZ, SDZ,
SIZA, SDZA, CALL, RET, RETI
Program Memorys
The Program Memory is the location where the user
code or program is stored. The device is a One-Time
Programmable, OTP, memory type device where users
can program their application code into the device. By
using the appropriate programming tools, OTP devices
offer users the flexibility to freely develop their applica-
tions which may be useful during debug or for products
requiring frequent upgrades or program changes. OTP
devices are also applicable for use in applications that
require low or medium volume production runs. The de-
vice is a Mask memory type device and offers the most
cost effective solution for high volume products.
Structure
The Program Memory has a capacity of 4K by 16 or 8K
by 16 bits. The Program Memory is addressed by the
Program Counter and also contains data, table informa-
tion and interrupt entries. Table data, which can be
setup in any location within the Program Memory, is ad-
dressed by separate table pointer registers.
Special Vectors
Within the Program Memory, certain locations are re-
served for special usage such as reset and interrupts.
· Location 000H
This vector is reserved for use by the device reset for
program initialisation. After a device reset is initiated, the
program will jump to this location and begin execution.
· Location 004H
This vector is used by the external interrupt. If the INT
external input pin on the device receives a high to low
transition, the program will jump to this location and
begin execution, if the interrupt is enabled and the
stack is not full.
· Location 008H
This vector is used by the timer0 counter. If a counter
overflow occurs, the program will jump to this location
and begin execution if the timer interrupt is enabled
and the stack is not full.
· Location 00CH
This vector is used by the timer1 counter. If a counter
overflow occurs, the program will jump to this location
and begin execution if the timer interrupt is enabled
and the stack is not full.
· Location 010H
This vector is used by serial interface . When 8-bits of
data have been received or transmitted successfully
from serial interface, the program will jump to this lo-
cation and begin execution if the interrupt is enabled
and the stack is not full.
· Table location
Any location in the program memory can be used as
look-up tables. There are three method to read the
ROM data by two table read instructions:
²TABRDC²
and
²TABRDL², transfer the contents of the lower-or-
der byte to the specified data memory, and the
higher-order byte to TBLH. The three methods are
shown as follows:
¨ The instructions
²TABRDC [m]² (the current page,
one page=256words), where the table locations is
defined by TBLP in the current page. And the
configuration option TBHP is disabled (default).
¨ The instructions
²TABRDC [m]², where the table lo-
cations is defined by registers TBLP (07H) and
TBHP (01FH). And the configuration option TBHP
is enabled.
¨ The instructions
²TABRDL [m]², where the table lo-
cations is defined by registers TBLP (07H) in the
last page (0F00H ~ 0FFFH or 1F00H~1FFFH).
0 F F F H
1 6 b i t s
I n i t i a l i s a t i o n
V e c t o r
E x t e r n a l
I n t e r r u p t V e c t o r
T i m e r / E v e n t C o u n t e r 0
I n t e r r u p t V e c t o r
T i m e r / E v e n t C o u n t e r 1
I n t e r r u p t V e c t o r
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
S P I
I n t e r r u p t V e c t o r
1 F F F H
1 6 b i t s
I n i t i a l i s a t i o n
V e c t o r
E x t e r n a l
I n t e r r u p t V e c t o r
T i m e r / E v e n t C o u n t e r 0
I n t e r r u p t V e c t o r
T i m e r / E v e n t C o u n t e r 1
I n t e r r u p t V e c t o r
0 0 0 H
0 0 4 H
0 0 8 H
0 0 C H
0 1 0 H
S P I
I n t e r r u p t V e c t o r
H T 8 2 K 7 0 E - L
H T 8 2 K 7 6 E - L
Program Memory Structure



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