công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

HT46F49E bảng dữ liệu(PDF) 15 Page - Holtek Semiconductor Inc

tên linh kiện HT46F49E
Giải thích chi tiết về linh kiện  Cost-Effective A/D Flash Type 8-Bit MCU with EEPROM
PDF  88 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  HOLTEK [Holtek Semiconductor Inc]
Trang chủ  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT46F49E bảng dữ liệu(HTML) 15 Page - Holtek Semiconductor Inc

Back Button HT46F49E Datasheet HTML 11Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 12Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 13Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 14Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 15Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 16Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 17Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 18Page - Holtek Semiconductor Inc HT46F49E Datasheet HTML 19Page - Holtek Semiconductor Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 88 page
background image
HT46F46E/HT46F47E/HT46F48E/HT46F49E
Rev. 1.40
15
July 28, 2009
Special Function Registers
To ensure successful operation of the microcontroller,
certain internal registers are implemented in the Data
Memory area. These registers ensure correct operation
of internal functions such as timers, interrupts, etc., as
well as external functions such as I/O data control and
A/D converter operation. The location of these registers
within the Data Memory begins at the address 00H. Any
unused Data Memory locations between these special
function registers and the point where the General Pur-
pose Memory begins is reserved for future expansion
purposes, attempting to read data from these locations
will return a value of 00H.
Indirect Addressing Register
- IAR0, IAR1
The Indirect Addressing Registers, IAR0 and IAR1, al-
though having their locations in normal RAM register
space, do not actually physically exist as normal regis-
ters. The method of indirect addressing for RAM data
manipulation uses these Indirect Addressing Registers
and Memory Pointers, in contrast to direct memory ad-
dressing, where the actual memory address is speci-
fied. Actions on the IAR0 and IAR1 registers will result in
no actual read or write operation to these registers but
rather to the memory location specified by their corre-
sponding Memory Pointer, MP0 or MP1. Acting as a
pair, IAR0 and MP0 can together only access data from
Bank 0, while the IAR1 and MP1 register pair can ac-
cess data from both Bank 0 and Bank 1. As the Indirect
Addressing Registers are not physically implemented,
reading the Indirect Addressing Registers indirectly will
return a result of
²00H² and writing to the registers indi-
rectly will result in no operation.
Memory Pointer
- MP0, MP1
For all devices, two Memory Pointers, known as MP0
and MP1 are provided. These Memory Pointers are
physically implemented in the Data Memory and can be
manipulated in the same way as normal registers pro-
viding a convenient way with which to address and track
data. When any operation to the relevant Indirect Ad-
dressing Registers is carried out, the actual address that
the microcontroller is directed to, is the address speci-
fied by the related Memory Pointer. MP0, together with
Indirect Addressing Register, IAR0, are used to access
data from Bank 0 only, while MP1 and IAR1 are used to
access data from both Bank 0 and Bank 1.
For devices with 64 or 88 bytes of RAM Data Memory,
bit 7 of the Memory Pointer is not implemented. How-
ever, it must be noted that when the Memory Pointer for
these devices is read, bit 7 will be read as high.
The following example shows how to clear a section of four RAM locations already defined as locations adres1 to
adres4.
data .section
¢data¢
adres1
db ?
adres2
db ?
adres3
db ?
adres4
db ?
block
db ?
code .section at 0
¢code¢
org
00h
start:
mov
a,04h
; setup size of block
mov
block,a
mov
a,offset adres1
; Accumulator loaded with first RAM address
mov
mp0,a
; setup memory pointer with first RAM address
loop:
clr
IAR0
; clear the data at address defined by MP0
inc
mp0
; increment memory pointer
sdz
block
; check if last memory location has been cleared
jmp
loop
continue:
The important point to note here is that in the example shown above, no reference is made to specific RAM ad-
dresses.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com