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V
Va
ar
riia
ab
blle
e G
Ga
aiin
n
Amplifier
2
2A
AM
M S
Se
er
riie
ess
▪ Tel : 82-31-250-5011
Page 6/9
▪ All specifications may change without notice.
▪ rfsales@rfhic.com
▪ Version 1.2
MSB
LSB
tCS
tCH
tES
tEW
Ta = 25℃, Vd3 = +3Vdc, Pin 8 = +3Vdc
PARAMETER
MIN
TYP
MAX
UNIT
Serial data clock frequency
10
MHz
Logic High Input : VH (pins 2, 3, 4)
0.7xVd3
V
Logic Low Input : VL (pins 2, 3, 4)
0.3xVd3
V
Data to Clock Set Up Time : tCS
10
ns
Data to Clock Hold Time : tCH
10
ns
Clock Pulse Width High : tCWH
30
ns
Clock Pulse Width Low : tCWL
30
ns
Clock to Load Enable Set Up Time : tES
10
ns
Load Enable Pulse Width : tEW
30
ns
16
8
4
2
1
0.5
Attenuation State
0
0
0
0
0
0
Reference Loss
0
0
0
0
0
1
0.5dB
0
0
0
0
1
0
1dB
0
0
0
1
0
0
2dB
0
0
1
0
0
0
4dB
0
1
0
0
0
0
8dB
1
0
0
0
0
0
16dB
Serial Data Input Timing
6-bit Program Registor Map
Digital Interface Specification
Truth Table
DATA
CLOCK
LE
LSB
MSB
B5
C16
B4
C8
B3
C4
B2
C2
B1
C1
B0
C0.5
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