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TAS5613 bảng dữ liệu(HTML) 4 Page - Texas Instruments

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TAS5613
SLAS676 – NOVEMBER 2009
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
TAS5613
UNIT
VDD to GND
–0.3 to 13.2
V
GVDD to GND
–0.3 to 13.2
V
PVDD_X to GND_X(2)
–0.3 to 53
V
OUT_X to GND_X(2)
–0.3 to 53
V
BST_X to GND_X(2)
–0.3 to 66.2
V
BST_X to GVDD_X(2)
–0.3 to 53
V
VREG to GND
–0.3 to 4.2
V
GND_X to GND
–0.3 to 0.3
V
GND to AGND
–0.3 to 0.3
V
OC_ADJ, M1, M2, M3, OSC_IO+, OSC_IO–, FREQ_ADJ, VI_CM, C_STARTUP,
–0.3 to 4.2
V
PSU_REF to GND
INPUT_X
–0.3 to 7
V
RESET, SD, OTW1, OTW2, CLIP, READY to GND
–0.3 to 7
V
Continuous sink current (SD, OTW1, OTW2, CLIP, READY)
9
mA
Operating junction temperature range, TJ
0 to 150
°C
Storage temperature, Tstg
–40 to 150
°C
Human-Body Model(3) (all pins)
±2
kV
Electrostatic discharge
Charged-Device Model(3) (all pins)
±500
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
These voltages represents the DC voltage + peak AC waveform measured at the terminal of the device in all conditions.
(3)
Failure to follow good anti-static ESD handling during manufacture and rework will contribute to device malfunction. Make sure the
operators handling the device are adequately grounded through the use of ground straps or alternative ESD protection.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
TYP
MAX
UNIT
PVDD_x
Half-bridge supply
DC supply voltage
18
36
38
V
Supply for logic regulators and
GVDD_x
DC supply voltage
10.8
12
13.2
V
gate-drive circuitry
VDD
Digital regulator supply voltage
DC supply voltage
10.8
12
13.2
V
RL(BTL)
3.5
4
Output filter according to Figure 12 and
RL(SE)
Load impedance
2.8
3
Ω
Figure 13
RL(PBTL)
1.6
2
Output filter according to Figure 12 +
RL (BTL)
Load impedance
2.8
3
Ω
Schottky, ROC = 22kΩ
LOUT(BTL)
7
10
LOUT(SE)
Output filter inductance
Minimum output inductance at IOC
7
15
μH
LOUT(PBTL)
7
10
Nominal
350
400
450
PWM frame rate selectable for AM
FPWM
interference avoidance; 1%
AM1
300
340
380
kHz
Resistor tolerance
AM2
260
300
335
Nominal; Master mode
9.5
10
10.5
PWM frame rate programming
RFREQ_ADJ
AM1; Master mode
19.8
20
20.2
k
Ω
resistor
AM2; Master mode
29.7
30
30.3
CPVDD
PVDD close decoupling capacitors
2.0
μF
ROC
Over-current programming resistor
Resistor tolerance = 5%
22
30
k
Ω
4
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TAS5613



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