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Figure 8. SPI MULTIPLE-BYTE BURST TRANSFER

READING AND WRITING IN BURST MODE

Burst mode is similar to a single-byte read or write, except that CE is kept high and additional SCLK

cycles are sent until the end of the burst. The clock registers and the user RAM can be read or written in

burst mode. When accessing the clock registers in burst mode, the address pointer wraps around after

reaching 1Fh (9Fh for writes). When accessing the user RAM in burst mode, the address pointer wraps

around after reaching 7Fh (FFh for writes).