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SC656 bảng dữ liệu(PDF) 15 Page - Semtech Corporation

tên linh kiện SC656
Giải thích chi tiết về linh kiện  Backlight Driver for 7 LEDs with Charge Pump and PWM Control
PDF  17 Pages
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nhà sản xuất  SEMTECH [Semtech Corporation]
Trang chủ  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC656 bảng dữ liệu(HTML) 15 Page - Semtech Corporation

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SC656
5
Place all bucket and decoupling capacitors —
C, C2, C
IN, and COUT — as close to the device as
possible.
All charge pump current passes through pins
IN, OUT, C+, C2+, C-, and C2-. Therefore,
ensure that all connections to these pins make
use of wide traces so that the voltage drop on
each connection is minimized.
The GND pin should be connected to a ground
plane using multiple vias to ensure proper
thermal connection for optimal heat transfer.
Make solid ground connections between the
grounds of the C
OUT, CIN, and the GND pin on the
device.
Resistors R
SETM and RSETS should be connected as
shown in Figure 2, close to pins IN and ISET.
The placement and routing shown minimizes
parasitic capacitance at the ISET pin.
•
•
•
•
•
Figure 3 shows the pads on layer  that should
be connected with vias to layer 2. C
IN, COUT and
the GND pin all use vias to connect to the
ground plane.
Figure 4 shows layer 2, which functions as the
ground plane. Layer 2 is also used for routing
signals to pins ENM, ENS, BANK, and BANK2. A
void in the copper beneath the ISETM and ISETS
pins serves to reduce capacitance coupled from
these pins to ground.
Avoid coupling noise to the ENM and ENS pins.
This will help prevent unintended clocking of
the PWM. The layout should be routed to
achieve the least possible trace to trace capaci-
tance between ENM and ENS. Also, minimize
trace capacitance between ENM or ENS and any
high speed signals.
•
•
•
Applications Information (continued)
Figure 4 — Layer 2
Figure 3 — Layer 1



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