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ATmega16HVB bảng dữ liệu(PDF) 110 Page - ATMEL Corporation |
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ATmega16HVB bảng dữ liệu(HTML) 110 Page - ATMEL Corporation |
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110 / 273 page ![]() 110 8042A–AVR–07/09 ATmega16HVB/32HVB Figure 19-3. Accumulation Current Conversions 19.4 Regular Current Detection Operation By setting the CADSE bit in CADCSRA the CC-ADC will enter a special Regular Current Detec- tion Sampling Mode. In this mode the CC-ADC will do one Instantaneous Current Conversion on regular sampling intervals while updating of the Accumulation Current Register is automatically disabled. The sampling interval is controlled by writing to the CADSI bits in CADCSRA. Each time a conversion is completed the result is compared with Regular Charge/Discharge Threshold levels specified in the CADRCC/CADRDC registers. If interrupt is enabled and the voltage is above/below the specified limit a Regular Current Detection Interrupt will be issued. Figure 19-4 illustrates the Regular Current Detection Mode. Figure 19-4. Regular Current Detection Mode (CADSE=1) 19.5 Offset Canceling by Polarity Switching The CC-ADC offers Polarity Switching for internal offset canceling. By switching the polarity of the sampled input signal at selected time intervals, the internal voltage offset of the CC-ADC will cancel at the output. This feature prevents the CC-ADC from accumulating an offset error over time. Enable Accumulation Interrupt Accumulation Data INVALID DATA DATA 1 DATA 2 DATA 3 DATA 5 Read byte 1 Read byte 2 Read byte 3 Read byte 4 125, 250, 500, or 1000 ms 125, 250, 500, or 1000 ms 1, 2, 3, or 4s settling 250, 500, 1000, or 2000 ms Measure Turn-off ~12ms ~250, 500, 1000, 2000ms Measure ~12ms Turn-off ~250, 500, 1000, 2000ms Regular Current Detection Operation Regular Current Detection Interupt Regular Charge Current Threshold Regular Discharge Current Threshold Current through RSENSE |
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