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ATmega328P bảng dữ liệu(PDF) 213 Page - ATMEL Corporation |
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ATmega328P bảng dữ liệu(HTML) 213 Page - ATMEL Corporation |
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213 / 345 page ![]() 213 7810A–AVR–11/09 ATmega328P [Preliminary] 21.5 Overview of the TWI Module The TWI module is comprised of several submodules, as shown in Figure 21-9. All registers drawn in a thick line are accessible through the AVR data bus. Figure 21-9. Overview of the TWI Module 21.5.1 SCL and SDA Pins These pins interface the AVR TWI with the rest of the MCU system. The output drivers contain a slew-rate limiter in order to conform to the TWI specification. The input stages contain a spike suppression unit removing spikes shorter than 50 ns. Note that the internal pull-ups in the AVR pads can be enabled by setting the PORT bits corresponding to the SCL and SDA pins, as explained in the I/O Port section. The internal pull-ups can in some systems eliminate the need for external ones. Address Register (TWAR) Address Match Unit Address Comparator Control Unit Control Register (TWCR) Status Register (TWSR) State Machine and Status control SCL Slew-rate Control Spike Filter SDA Slew-rate Control Spike Filter Bit Rate Generator Bit Rate Register (TWBR) Prescaler Bus Interface Unit START / STOP Control Arbitration detection Ack Spike Suppression Address/Data Shift Register (TWDR) |
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