3

6483A–ATARM–04-Aug-09

ATSAM3U Errata

Configure the ADC in Off Mode in the ADC Extended Mode Register (ADC_EMR) after reset.

Problem Fix

This issue will be fixed in the next revision.

1.2.2.4

ADC12B: Current Consumption in Backup Mode on VDDANA

In Backup mode, the ADC is not in Off Mode, but in Standby Mode (even if the software has pre-

viously put it in Off mode) leading to current consumption on VDDANA (1.4 mA instead of

0.1µA).

Workaround

None.

Problem Fix

This issue will be fixed in the next revision.

1.2.3

Serial Wire and JTAG Debug Port (SWJ-DP)

1.2.3.1

SWJ-DP: Asynchronous Trace (TRACESWO)

Asynchronous Trace (TRACESWO) does not work.

Workaround

None.

Problem Fix

This issue will be fixed in the next revision.

1.2.3.2

SWJ-DP: Processor Reset

A processor reset also asserts SWJ-DP. Connection issue in debug mode.

Workaround

Workaround applied by Segger on SAM-ICE Firmware.

Problem Fix

This issue will be fixed in the next revision.

1.2.4

Supply Controller (SUPC)

1.2.4.1

SUPC: Bad behavior of SMS and SMOS bit in SUPC_SR in Sample mode

When the Supply Monitor is configured in sample mode (SMSMPL > 1), the SMS and SMOS bits

of the supply controller status register (SUPC_SR) might not be reliable when polling SUPC_SR.

Workaround

Use the Supply Monitor Interrupt instead of polling the status register. In the interrupt handler,

set the Supply Monitor in Continuos mode to check the bits SMA and SMOS.

Problem Fix

This issue will be fixed in the next revision.