AT45DB642D datasheet(2/58 Pages) ATMEL

2 / 58 page

3542K–DFLASH–04/09

AT45DB642D

1. Description

The AT45DB642D is a 2.7-volt, dual-interface sequential access Flash memory ideally suited for

a wide variety of digital voice-, image-, program code- and data-storage applications. The

AT45DB642D supports RapidS serial interface and Rapid8 8-bit interface. RapidS serial inter-

face is SPI compatible for frequencies up to 66 MHz. The dual-interface allows a dedicated

serial interface to be connected to a DSP and a dedicated 8-bit interface to be connected to a

microcontroller or vice versa. However, the use of either interface is purely optional. Its

69,206,016 bits of memory are organized as 8,192 pages of 1,024 bytes (binary page size) or

1,056 bytes (standard DataFlash page size) each. In addition to the main memory, the

AT45DB642D also contains two SRAM buffers of 1,024 (binary buffer size) bytes/1,056 bytes

(standard DataFlash buffer size) each. The buffers allow receiving of data while a page in the

main Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM

emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-

write operation. Unlike conventional Flash memories that are accessed randomly with multiple

address lines and a parallel interface, the DataFlash uses either a RapidS serial interface or a

8-bit Rapid8 interface to sequentially access its data. The simple sequential access dramatically

reduces active pin count, facilitates hardware layout, increases system reliability, minimizes

switching noise, and reduces package size. The device is optimized for use in many commercial

and industrial applications where high-density, low-pin count, low-voltage and low-power are

essential.

To allow for simple in-system reprogrammability, the AT45DB642D does not require high input

voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for

both the program and read operations. The AT45DB642D is enabled through the chip select pin

(CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output

(SO), and the Serial Clock (SCK), or an 8-bit interface consisting of the input/output pins (I/O7 -

I/O0) and the clock pin (CLK).

All programming and erase cycles are self-timed.

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