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56F8365 bảng dữ liệu(PDF) 21 Page - Freescale Semiconductor, Inc |
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56F8365 bảng dữ liệu(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 180 page ![]() Signal Pins 56F8365 Technical Data, Rev. 8 Freescale Semiconductor 21 Preliminary GPIOB0 (A16) 27 Schmitt Input/ Output Output Input, pull-up enabled Port B GPIO — These four GPIO pins can be individually programmed as an input or output pin. Address Bus — A16 - A19 specify four of the address lines for external program or data memory accesses. Depending upon the state of the DRV bit in the EMI bus control register (BCR), A16 - A19 and EMI control signals are tri-stated when the external bus is inactive. After reset, the default state is GPIO. To deactivate the internal pull-up resistor, clear bit 0 in the GPIOB_PUR register. Example: GPIOB1, clear bit 1 in the GPIOB_PUR register. GPIOB1 (A17) 28 GPIOB2 (A18) 29 GPIOB3 (A19) 30 GPIOB4 (A20) (prescaler_ clock) 31 Schmitt Input/ Output Output Output Input, pull-up enabled Port B GPIO — This GPIO pin can be individually programmed as an input or output pin. Address Bus — A20 specifies one of the address lines for external program or data memory accesses. Depending upon the state of the DRV bit in the EMI bus control register (BCR), A20 and EMI control signals are tri-stated when the external bus is inactive. Clock Output — can be used to monitor the prescaler_clock on GPIOB4. After reset, the default state is GPIO. This pin can also be used to view the prescaler_clock. In these cases, the GPIOB_PER can be used to disable the GPIO. The CLKOSR register in the SIM can then be used to choose between address and clock functions; see Part 6.5.7 for details To deactivate the internal pull-up resistor, clear bit 4 in the GPIOB_PUR register. Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued) Signal Name Pin No. Type State During Reset Signal Description |
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