AD7944BCPZ datasheet(25/28 Pages) AD

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AD7944

Rev. 0 | Page 25 of 28

APPLICATIONS INFORMATION

LAYOUT

The printed circuit board (PCB) that houses the AD7944

should be designed so that the analog and digital sections

are separated and confined to certain areas of the board.

The pinout of the AD7944, with its analog signals on the left

side and its digital signals on the right side, eases this task.

Avoid running digital lines under the device because they

couple noise onto the die, unless a ground plane under the

AD7944 is used as a shield. Fast switching signals, such as

CNV or clocks, should not run near analog signal paths.

Avoid crossover of digital and analog signals.

At least one ground plane should be used. It can be common or

split between the digital and analog sections. In the latter case,

the planes should be joined underneath the AD7944 devices.

The AD7944 voltage reference inputs (REF) have a dynamic

input impedance and should be decoupled with minimal

parasitic inductances. This is done by placing the reference

decoupling ceramic capacitor close to, ideally right up against,

the REF and REFGND pins and connecting them with wide,

low impedance traces.

Finally, the power supplies, VDD and VIO of the AD7944,

should be decoupled with ceramic capacitors, typically 100 nF,

placed close to the AD7944 and connected using short, wide

traces to provide low impedance paths and to reduce the effect

of glitches on the power supply lines.

EVALUATING AD7944 PERFORMANCE

Other recommended layouts for the AD7944 are outlined

in the documentation for the AD7944 evaluation board

(EVAL-AD7944EBZ). The evaluation board package includes

a fully assembled and tested evaluation board, documentation,

and software for controlling the board from a PC via the

EVAL-CED1Z board.

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