PCF2119DUSLASH2SLASH2 datasheet(52/79 Pages) NXP

52 / 79 page

PCF2119X_5

Product data sheet

Rev. 05 — 13 August 2009

52 of 79

NXP Semiconductors

PCF2119x

LCD controllers/drivers

16. Application information

16.1 General application information

The required minimum value for the external capacitors in an application with the

PCF2119x are: Cext from pins VLCD to VSS = 100 nF and for pins VDD to VSS = 470 nF.

Higher capacitor values are recommended for ripple reduction.

For COG applications the recommended ITO track resistance is to be minimized for the

I/O and supply connections. Optimized values for these tracks are below 50

Ω for the

supply and below 100

Ω for the I/O connections. Higher track resistance reduce

performance and increase current consumption. To avoid accidental triggering of

Power-On Reset (POR) (especially in COG applications), the supplies must be

adequately decoupled. Depending on power supply quality, VDD1 may have to be risen

above the speciﬁed minimum.

When external LCD supply voltage is supplied, VLCDOUT should be left open-circuit to

avoid any stray current, and VLCDIN must be connected to VLCDSENSE.

16.2 Power supply connections for internal VLCD generation

Decoupling capacitors are not shown in the drawings.

Fig 37. Recommended VDD connections for internal VLCD generation

Fig 38. Recommended VLCD connections for internal VLCD generation

VDD1

VDD2

VDD3

VSS1

VSS2

GND

1.5 V to 5.5 V

2.2 V to 4.0 V

013aaa114

VDD1

VDD2

VDD3

VSS1

VSS2

GND

2.2 V to 4.0 V

013aaa115

013aaa116

VSS2

VLCDIN

VLCDOUT

VLCDSENSE

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