NJG1663K44

- 11 -

TEST PCB LAYOUT

(TOP VIEW)

Losses of PCB, capacitors and connectors

PRECAUTIONS

[1]

The DC blocking capacitors (C1~C10) have to be placed at RF terminal of PCA, PCB, P1A, P2A, P3A, P4A, P1B,

P2B, P3B, and P4B.

[2]

To reduce strip line influence on RF characteristics, please locate bypass capacitor (C11) close to VDD terminal.

[3]

For good isolation, the GND terminal must be connected to the ground plane of substrate, and through-holes for

GND should be placed near by the pin connection.

PCB:

FR-4, t=0.2mm

Capacitor Size:

1005

Strip Line Width: 0.4mm

PCB Size:

53 x 40mm

C11

C6

C5

C4

C2

C1

C10

PCA

C9

PCB

P1B

P1A

P2A

P2B

P3B

P3A

P4B

P4A

C8

C7

C3

Paths

Frequency (GHz)

Loss (dB)

1.0

0.49

2.0

0.79

PCA-P1A, PCB-P1B

PCA-P3A, PCB-P3B

2.7

0.98

1.0

0.45

2.0

0.77

PCA-P2A, PCB-P2B

PCA-P4A, PCB-P4B

2.7

0.95