M68HC08 datasheet(39/230 Pages) MOTOROLA

39 / 230 page

Memory

Input/Output (I/O) Section

MC68HC908QY4•MC68HC908QT4•MC68HC908QY2•MC68HC908QT2•MC68HC908QY1•MC68HC908QT1

MOTOROLA

Memory

$0036

Oscillator Status Register

(OSCSTAT)

See page 111.

Read:

RRRRRR

ECGON

ECGST

Write:

Reset:

000000

$0037

Unimplemented Read:

$0038

Oscillator Trim Register

(OSCTRIM)

See page 112.

Read:

TRIM7

TRIM6

TRIM5

TRIM4

TRIM3

TRIM2

TRIM1

TRIM0

Write:

Reset:

000000

$0039

↓

$003B

Unimplemented

$003C

ADC Status and Control

See page 157.

Read:

COCO

AIEN

ADCO

CH4

CH3

CH2

CH1

CH0

Write:

Reset:

011111

$003D

Unimplemented

$003E

ADC Data Register

(ADR)

See page 159.

Read:

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

Write:

Reset:

Indeterminate after reset

$003F

ADC Input Clock Register

(ADICLK)

See page 159.

Read:

ADIV2

ADIV1

ADIV0

00000

Write:

Reset:

000000

$FE00

Break Status Register

(BSR)

See page 208.

Read:

RRRRRR

SBSW

Write:

See note 1

Reset:

1. Writing a logic 0 clears SBSW.

$FE01

SIM Reset Status Register

(SRSR)

See page 96.

Read:

POR

COP

ILOP

ILAD

MODRST

LVI

Write:

POR:

000000

Addr.

Bit 7

54321

Bit 0

= Unimplemented

= Reserved

U = Unaffected

Figure 2-2. Control, Status, and Data Registers (Sheet 4 of 6)

M68HC08 bảng dữ liệu(PDF) 39 Page - Motorola, Inc

M68HC08 bảng dữ liệu(HTML) 39 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL