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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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DM164 bảng dữ liệu(PDF) 21 Page - Silicon Touch Technology Inc. |
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DM164 bảng dữ liệu(HTML) 21 Page - Silicon Touch Technology Inc. |
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21 / 30 page  點晶科技股份有限公司 SILICON TOUCH TECHNOLOGY INC. DM164 8x3-CHANNEL CONSTANT CURRENT LED DRIVERS Version:A.002 Page 20 Application Diagram a) DCK LTH and GCK signals: Global Connected * Each DCKPH input pin of all chips should be connected to the same voltage level. Figure 12 shows that all DCKPH pins are connected to VSS. DIN DCKI LTHI GCKI DOUTPH ONEST EN_B DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ VSS VDD Vled ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DOUT Chip 01 Chip 02 Chip 03 Chip 04 Figure 12. DCK LTH and GCK signals: Global Connected b) DCK LTH and GCK signals: Cascade Connected * DCKPH input pins of odd stages (Chip01, Chip03…) and even stages (Chip02, Chip04…) should be connected to different voltage level. Figure 13 shows that CLKPH pins of odd stages are connected to VSS, and CLKPH pins of even stages are connected to VDD. DIN DCKI LTHI GCKI DOUTPH ONEST EN_B DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ VSS VDD Vled ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DIN DCKI LTHI GCKI DCKPH DOUTPH ONEST EN_B DOUT DCKO LTHO GCKO REXT_R REXT_G REXT_B VSS VDD IOUT0 IOUT1 IOUT2 IOUT23 ‧ ‧ ‧ ‧ ‧ ‧ ... DOUT Chip 01 Chip 02 Chip 03 Chip 04 DCKO DOUT GCKO Figure 13. DCK LTH and GCK signals: Cascade Connected |
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