MCP4728 datasheet(48/66 Pages) MICROCHIP

48 / 66 page

MCP4728

DS22187C-page 48

FIGURE 6-2:

DNL Accuracy.

6.5

Offset Error

Offset error (see Figure 6-3) is the deviation from zero

voltage output when the digital input code is zero (zero

scale voltage). This error affects all codes by the same

amount. For the MCP4728 device, the offset error is

not trimmed at the factory. However, it can be calibrated

by software in application circuits.

FIGURE 6-3:

Offset Error.

6.6

Gain Error

Gain error (see Figure 6-4) is the difference between

the actual full scale output voltage from the ideal output

voltage of the DAC transfer curve. The gain error is

calculated after nullifying the offset error, or full scale

error minus the offset error.

The gain error indicates how well the slope of the actual

transfer function matches the slope of the ideal transfer

function. The gain error is usually expressed as percent

of full scale range (% of FSR) or in LSB.

For the MCP4728 device, the gain error is not

calibrated at the factory and most of the gain error is

contributed by the output buffer (op amp) saturation

near the code range beyond 4000. For applications that

need the gain error specification less than 1%

maximum, a user may consider using the DAC code

range between 100 and 4000 instead of using full code

range (code 0 to 4095). The DAC output of the code

range between 100 and 4000 is much more linear than

full scale range (0 to 4095). The gain error can be

calibrated out by software in applications.

6.7

Full Scale Error (FSE)

Full scale error (see Figure 6-4) is the sum of offset

error plus gain error. It is the difference between the

ideal and measured DAC output voltage with all bits set

to one (DAC input code = FFFh).

EQUATION 6-4:

FIGURE 6-4:

Gain Error and Full Scale

Error.

6.8

Gain Error Drift

Gain error drift is the variation in gain error due to a

change in ambient temperature. The gain error drift is

typically expressed in ppm/°C.

010

001

000

Analog

Output

(LSB)

DAC Input Code

011

111

100 101

DNL = 2 LSB

DNL = 0.5 LSB

110

Ideal Transfer Function

Actual Transfer Function

Analog

Output

Ideal Transfer Function

Actual Transfer Function

DAC Input Code

Offset

Error

FSE

OUT

Ideal

–

()

LSB

---------------------------------------

Where:

FSE is expressed in LSB.

VIdeal

=(VREF) (1 - 2

-n) - Offset Voltage (V

OS)

VREF

Voltage Reference

Analog

Output

Actual Transfer Function

DAC Input Code

Gain Error

Ideal Transfer Function

after Offset Error is removed

Full Scale

Error

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