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STM32F103CBT7TR bảng dữ liệu(PDF) 61 Page - STMicroelectronics

tên linh kiện STM32F103CBT7TR
Giải thích chi tiết về linh kiện  Medium-density performance line ARM-based 32-bit MCU with 64 or 128 KB Flash, USB, CAN, 7 timers, 2 ADCs, 9 communication interfaces
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STM32F103CBT7TR bảng dữ liệu(HTML) 61 Page - STMicroelectronics

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STM32F103x8, STM32F103xB
Electrical characteristics
Doc ID 13587 Rev 11
61/92
Figure 25.
Recommended NRST pin
protection
2.
The reset network protects the device against parasitic resets.
3.
The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in
Table 37. Otherwise the reset will not be taken into account by the device.
5.3.14
TIM timer characteristics
The parameters given in Table 38 are guaranteed by design.
Refer to Section 5.3.12: I/O port characteristics for details on the input/output alternate
function characteristics (output compare, input capture, external clock, PWM output).
ai14132c
STM32F10xxx
RPU
NRST(2)
VDD
Filter
Internal Reset
0.1 µF
External
reset circuit(1)
Table 38.
TIMx(1) characteristics
1.
TIMx is used as a general term to refer to the TIM1, TIM2, TIM3 and TIM4 timers.
Symbol
Parameter
Conditions
Min
Max
Unit
tres(TIM)
Timer resolution time
1
tTIMxCLK
fTIMxCLK = 72 MHz
13.9
ns
fEXT
Timer external clock
frequency on CH1 to CH4
0
fTIMxCLK/2
MHz
fTIMxCLK = 72 MHz
036
MHz
ResTIM
Timer resolution
16
bit
tCOUNTER
16-bit counter clock period
when internal clock is
selected
1
65536
tTIMxCLK
fTIMxCLK = 72 MHz 0.0139
910
µs
tMAX_COUNT Maximum possible count
65536 × 65536
tTIMxCLK
fTIMxCLK = 72 MHz
59.6
s



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