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ST7263BEx bảng dữ liệu(PDF) 89 Page - STMicroelectronics

tên linh kiện ST7263BEx
Giải thích chi tiết về linh kiện  Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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ST7263BEx bảng dữ liệu(HTML) 89 Page - STMicroelectronics

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ST7263Bxx
On-chip peripherals
Doc ID 7516 Rev 8
89/186
Figure 43.
Bit sampling in reception mode
11.3.5
Low power modes
11.3.6
Interrupts
The SCI interrupt events are connected to the same interrupt vector.
These events generate an interrupt if the corresponding Enable Control Bit is set and the
interrupt mask in the CC register is reset (RIM instruction).
RDI LINE
Sample
clock
12345678910
11 12
13
14
15
16
sampled values
One bit time
6/16
7/16
7/16
Table 27.
Low power modes
Mode
Description
WAIT
No effect on SCI.
SCI interrupts cause the device to exit from Wait mode.
HALT
SCI registers are frozen.
In Halt mode, the SCI stops transmitting/receiving until Halt mode is
exited.
Table 28.
Interrupts
Interrupt event
Event flag
Enable
Control
bit
Exit
from
Wait
Exit
from
Halt
Transmit Data register Empty
TDRE
TIE
Yes
No
Transmission Complete
TC
TCIE
Yes
No
Received Data Ready to be Read
RDRF
RIE
Yes
No
Overrun Error Detected
OR
Yes
No
Idle Line Detected
IDLE
ILIE
Yes
No
Parity Error
PE
PIE
Yes
No



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