CS2300-CP_09 datasheet(25/32 Pages) CIRRUS

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CS2300-CP

DS843F1

8.2.3

PLL Clock Output Disable (ClkOutDis)

This bit controls the output driver for the CLK_OUT pin.

8.3

Device Configuration 1 (Address 03h)

8.3.1

R-Mod Selection (RModSel[2:0])

Selects the R-Mod value, which is used as a factor in determining the PLL’s Fractional N.

8.3.2

Auxiliary Output Source Selection (AuxOutSrc[1:0])

Selects the source of the AUX_OUT signal.

Note:

When set to 11, AuxLckCfg sets the polarity and driver type. See “AUX PLL Lock Output Config-

uration (AuxLockCfg)” on page 27.

ClkOutDis

Output Driver State

CLK_OUT output driver enabled.

CLK_OUT output driver set to high-impedance.

Application:

“PLL Clock Output” on page 19

76543210

RModSel2

RModSel1

RModSel0

Reserved

AuxOutSrc1

AuxOutSrc0

EnDevCfg1

RModSel[2:0]

R-Mod Selection

000

Left-shift R-value by 0 (x 1).

001

Left-shift R-value by 1 (x 2).

010

Left-shift R-value by 2 (x 4).

011

Left-shift R-value by 3 (x 8).

100

Right-shift R-value by 1 (÷ 2).

101

Right-shift R-value by 2 (÷ 4).

110

Right-shift R-value by 3 (÷ 8).

111

Right-shift R-value by 4 (÷ 16).

Application:

“Ratio Modifier (R-Mod)” on page 17

AuxOutSrc[1:0]

Auxiliary Output Source

Reserved.

CLK_IN.

CLK_OUT.

PLL Lock Status Indicator.

Application:

“Auxiliary Output” on page 19

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