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MAX9526 bảng dữ liệu(PDF) 4 Page - Maxim Integrated Products

tên linh kiện MAX9526
Giải thích chi tiết về linh kiện  Low-Power, High-Performance NTSC/PAL Video Decoder
PDF  38 Pages
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nhà sản xuất  MAXIM [Maxim Integrated Products]
Trang chủ  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAX9526 bảng dữ liệu(HTML) 4 Page - Maxim Integrated Products

  MAX9526 Datasheet HTML 1Page - Maxim Integrated Products MAX9526 Datasheet HTML 2Page - Maxim Integrated Products MAX9526 Datasheet HTML 3Page - Maxim Integrated Products MAX9526 Datasheet HTML 4Page - Maxim Integrated Products MAX9526 Datasheet HTML 5Page - Maxim Integrated Products MAX9526 Datasheet HTML 6Page - Maxim Integrated Products MAX9526 Datasheet HTML 7Page - Maxim Integrated Products MAX9526 Datasheet HTML 8Page - Maxim Integrated Products MAX9526 Datasheet HTML 9Page - Maxim Integrated Products Next Button
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Low-Power, High-Performance
NTSC/PAL Video Decoder
4
_______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VAVDD = VDVDD = +1.8V, VDVDDIO = +3.3V, AGND = DGND = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Differential GainDG
5-step modulated staircase,
f = 3.58MHz or 4.43MHz
1%
2T Pulse Response
2T = 200ns or 250ns
0.4
%
2T Bar Response
Bar time is 18µs, the beginning 2.5% and
ending 2.5% of the bar time are ignored,
2T = 200ns or 250ns
0.2
%
2T Pulse to Bar Rating
Bar time is 18µs, the beginning 2.5% and
ending 2.5% of the bar time are ignored,
2T = 200ns or 250ns
0.2
%
Group Delay Distortion
100kHz < f < 5MHz±1
ns
DECODED LUMINANCE AND CHROMINANCE CHANNELS (Note 5)
Chroma Bandwidth
BWC
1MHz
Luma Bandwidth
BWL
5.5
MHz
Luma Nonlinearity
5-step staircase
1
%
Luma Line Time Distortion (H-Tilt)
LD
Measured at the output regarding active video
0.5
%
Luma Field Time Distortion (V-Tilt)
FD
Measured at the output regarding active video
0.1
%
DIGITAL COMPOSITE DECODER
Lock Time
3
frames
Horizontal Line Time Static Variation
-5
+5
%
Maximum Horizontal Line Time
Jitter (Async Mode)
5µs
Maximum Horizontal Line Time
Jitter (LLC mode)
160
ns
Line-Locked Clock Frequency
fLLC
Varies with input line rate
27
MHz
Minimum Peak Signal to RMS Noise
Proper composite decoder operation
23
dB
PLL
Async Mode Jitter
Ideal input clock
20
psRMS
000
180
001
250
010
375
011 (default)
500
100
750
101
1000
110
1500
Line-Locked PLL Loop Bandwidth
Set by Register 0x0E[2:0]
111
2000
Hz



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