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TMC2193 bảng dữ liệu(PDF) 14 Page - Cadeka Microcircuits LLC.

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TMC2193
PRODUCT SPECIFICATION
14
REV. 1.0 3/26/03
Horizontal Programming
Control registers for this section
Horizontal interval timing is fully programmable and is
established by loading the timing registers with the duration
of each horizontal element. The duration is expressed in
PCK clock cycles. In this way, any pixel clock rate between
10 MHz and 15 MHz can be accommodated, and any desired
standard or non-standard horizontal video timing may be
produced.
Horizontal timing parameters can be calculated as follows:
t = N x ( PCK period )
= N x ( 2 x PXCK period )
where N is the value loaded into the appropriate timing
register, and PCK is the pixel clock period.
When programming horizontal timing, subtract 5 PCK
periods from the calculated values of CBP and add 5 PCK
periods to the calculated value for VA. The control register
HALFEN enables the 1st half line (UBV) on line 283 for
NTSC, PAL-M and line 23 for all other PAL standards when
it is LOW.
Address
Bit(s)
Name
0x06
7-6
FORMAT
0x19
7
SHORT
0x19
6
T512
0x19
5
HALFEN
0x20
7-0
SY
0x21
7-0
BR
0x22
7-0
BU
0x23
7-0
CBP
0x24
7-0
XBP
0x25
7-0
VA
0x26
7-0
VC
0x27
7-0
VB
0x28
7-0
EL
0x29
7-0
EH
0x2A
7-0
SL
0x2B
7-0
SH
0x2C
7-0
FP
0x2D
7-6
XBP (MSB’s)
0x2D
5-4
VA (MSB’s)
0x2D
3-2
VB (MSB’s)
0x2D
1-0
VC (MSB’s)
Table 7. Horizontal Line Equations
Line Type
Line ID
Line Length Equals
EE
00
EL + EH + EL + EH
SE
02
SL + SH + EL + EH
SS
03
SL + SH + SL + SH
ES
01
EL + EH + SL + SH
EB
10
EL + EH + EL + EH
UBB, -BB
0D, 05
SY + BR + BU + CBP + VA + FP
UVV, -VV
0F, 07
SY + BR + BU + CBP + VA + FP
UVE, -VE
0C, 04
SY + BR + BU + CBP + VC + FP + EL + EH
UBV
0E
SY + BR + BU + XBP + VB + FP



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