SPT7810 datasheet(4/9 Pages) CADEKA

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SPT7810

Figure 1A: Timing Diagram

tpwL

tpwH

Data Valid

N+1

N+2

Data Valid

CLK

Output

Data

CLK

Figure 1B: Single Event Clock

Data Valid

CLK

Output

Data

CLK

Table I - Timing Parameters

PARAMETERS

DESCRIPTION

MIN

TYP

MAX

UNITS

CLK to Data Valid Prop Delay

tpwH

CLK High Pulse Width

300

tpwL

CLK Low Pulse Width

TEST LEVEL CODES

All electrical characteristics are subject to the

following conditions:

All parameters having min/max specifications

are guaranteed. The Test Level column indi-

cates the specific device testing actually per-

formed during production and Quality Assur-

ance inspection. Any blank section in the data

column indicates that the specification is not

tested at the specified condition.

TEST PROCEDURE

100% production tested at the specified temperature.

100% production tested at TA=25 °C, and sample

tested at the specified temperatures.

QA sample tested only at the specified temperatures.

Parameter is guaranteed (but not tested) by design

and characterization data.

Parameter is a typical value for information purposes

only.

100% production tested at TA = 25 °C. Parameter is

guaranteed over specified temperature range.

TEST LEVEL

III

3/11/97

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