| công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
|
SPT5140 bảng dữ liệu(PDF) 5 Page - Cadeka Microcircuits LLC. |
|
|
|||||||||||||||||||||||||||||
SPT5140 bảng dữ liệu(HTML) 5 Page - Cadeka Microcircuits LLC. |
|
5 / 12 page ![]() SPT5140 OUTPUT CONSIDERATIONS The analog outputs are designed to directly drive a dou- bly terminated 50 or 75 ohm load transmission system as shown. The source impedances of the SPT5140 outputs are high impedance current sinks. The load impedance (RL) must be 25 or 37.5 ohms to attain standard RS-343- A video levels. Any deviation from this impedance will affect the resulting video output levels proportionally. As with the data interface, it is important that the analog transmission lines have matched impedance throughout, including connectors and transitions between printed wiring and coaxial cable. The combination of matched source termination resistor RS and load terminator RL minimizes reflections of both forward and reverse travel- ing waves in the analog transmission system. The return path for analog output current is VCC, which is connected to the source termination resistor RS. POWER CONSIDERATIONS The SPT5140 operates from a single –5.2 V standard supply. Proper bypassing of the supplies will augment the SPT5140’s inherent supply noise rejection characteris- tics. As shown in figure 2, each supply pin should be by- passed as close to the device as possible with 0.01 µF and 10 µF capacitors. The SPT5140 has two analog (VEE) power supply pins. Both supply pins should be properly bypassed as men- tioned previously. This device also has two analog (VCC) ground pins. Both ground pins should be tied to the analog ground plane. Power and ground pins must be connected in all applications. If a +5 V power source is required, the ground pins (VCC) become the positive sup- ply pins while the supply pins (VEE) become the ground pins. The relative polarities of the other input and output voltages must be maintained. Figure 2 – Typical Interface Circuit 10. = VCC = AGND See figure 9 for detail on Ref Buffer. R2 1 k Ω 4 to 15 Decode Video Control Inputs Video Data Inputs Clock 4 4 ) ( Ref Buffer V+ R1 1 k Ω ISet ISet * Bandgap Reference V– Ref In 1k Ω Optional External Reference –5.2 V .01 µF Remove J1 For External Reference LM113/313 FT FH Blank BRT Sync D0 (LSB) D1 D2 D3 D4 D5 D6 D7 (MSB) CONV CONV 2 k Ω Video Monitor Out+ R3 50/75 Ω R4 50/75 Ω 50/75 Ω COAX All reference resistors 1/8 W 1% metal film, power supply decoupling 50 V ceramic disc NOTES: V– = –1.2 V (typical) for LM113 or VBG V+ = –1.2 V RL = R3 / / R4 K = 15.8069 K1 = 1.7617 K2 = 10.0392 FB = Ferrite bead, Fair-rite pin 217430011 or equivalent. 1. = ECL Termination x 2. 3. 4. 6. 7. 8. 9. ISet = V+ αT(R 1+R2) ; typ = 1.105 mA VOUT = 255 5. VSync = (K x ISet x RL) + (K2 x ISet x RL) *An external reference can be used or the reference from Ref Out can drive three SPT5140s. Out– 255–Digital Input Code xISet RL + [K 1 x ISet x RL(bright) K VEE VCC –5.2 V .01 µF 10 µF FB = DGND (digital input drivers). 12. [ ] ] 11. 5 3/28/00 |
|
|
Link URL |
| Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không? [ DONATE ] |
Alldatasheet là | Quảng cáo | Liên lạc với chúng tôi | Chính sách bảo mật | Liên kết đến bảng dữ liệu | Trao đổi link | Tìm kiếm theo nhà sản xuất All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |