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UCC5614 bảng dữ liệu(PDF) 2 Page - Texas Instruments |
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UCC5614 bảng dữ liệu(HTML) 2 Page - Texas Instruments |
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2 / 5 page ![]() UCC5614 The power amplifier output stage allows the UCC5614 to source full termination current and sink active negation current when all termination lines are actively negated. The UCC5614 is pin for pin compatible with Unitrode’s other 9 line SCSI terminators, allowing lower capacitance and lower voltage upgrades to existing systems. The UCC5614, as with all Unitrode terminators, is completely hot pluggable and appears as high impedance at the ter- minating channels with VTRMPWR = 0V or open. Internal circuit trimming is utilized, first to trim the 110 ohm termination impedance to a 7% tolerance, and then most importantly, to trim the output current to a 4% toler- ance, as close to the max SCSI-3 spec as possible, which maximizes noise margin in fast SCSI operation. Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry standard 16 pin narrow body SOIC, 16 pin ZIP (Zig-Zag In Line package), 24 pin TSSOP and 28 pin PLCC. ABSOLUTE MAXIMUM RATINGS Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6A Storage Temperature . . . . . . . . . . . . . . . . . . . −−65°C to +150°C Operating Temperature . . . . . . . . . . . . . . . . . −−55°C to +150°C Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . +300°C RECOMMENDED OPERATING CONDITIONS Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.25V Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +5V Disconnect Input Voltage . . . . . . . . . . . . . . . . . . 0V to Termpwr Description Continued Unless otherwise specified all voltages are with respect to Ground. Currents are positive into, negative out of the speci- fied terminal. Consult Packaging Section of Unitrode Integrated Circuits dat- abook for thermal limitations and considerations of packages. CONNECTION DIAGRAMS DIL-16 (Top View) N or J Package ZIP-16 (Top View) Z Package Note: Drawings are not to scale. 2 |
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