LTM8032EVPBF datasheet(7/20 Pages) LINER

tên linh kiện	LTM8032EVPBF

Giải thích chi tiết về linh kiện	Ultralow Noise EMC Compliant 36V, 2A DC/DC 關Module

PDF	20 Pages

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nhà sản xuất	LINER [Linear Technology]

Trang chủ	http://www.linear.com

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LTM8032

8032fa

PIN FUNCTIONS

SYNC (Pin L6): This is the external clock synchronization

input. Ground this pin for low ripple Burst Mode

® operation

at low output loads. Tie to a stable voltage source greater

than 0.7V to disable Burst Mode operation. Do not leave

this pin ﬂoating. Tie to a clock source for synchronization.

Clock edges should have rise and fall times faster than 1μs.

See synchronizing section in Applications Information.

PGOOD (Pin K7): The PGOOD pin is the open-collector

output of an internal comparator. PGOOD remains low until

the ADJ pin is within 10% of the ﬁnal regulation voltage.

The PGOOD output is valid when VIN is above 3.6V and

RUN/SS is high. If this function is not used, leave this

pin ﬂoating.

ADJ (Pin J7): The LTM8032 regulates its ADJ pin to 0.79V.

Connect the adjust resistor from this pin to ground. The

value of RADJ is given by the equation:

ADJ

OUT

196 71

079

–.

where RADJ is in kΩ.

BLOCK DIAGRAM

CURRENT

MODE

CONTROLLER

249k

10μF

VOUT

AUX

GND

4.7μH

BIAS

EMI FILTER

FIN

VIN

GND

SYNC

PGOOD

ADJ

8032 BD

RUN/SS

Burst Mode is a registered trademark of Linear Technology Corporation.

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