công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

LTM4615EVPBF bảng dữ liệu(PDF) 18 Page - Linear Technology

tên linh kiện LTM4615EVPBF
Giải thích chi tiết về linh kiện  Triple Output, Low Voltage DC/DC 關Module Regulator
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  LINER [Linear Technology]
Trang chủ  http://www.linear.com
Logo LINER - Linear Technology

LTM4615EVPBF bảng dữ liệu(HTML) 18 Page - Linear Technology

Back Button LTM4615EVPBF Datasheet HTML 14Page - Linear Technology LTM4615EVPBF Datasheet HTML 15Page - Linear Technology LTM4615EVPBF Datasheet HTML 16Page - Linear Technology LTM4615EVPBF Datasheet HTML 17Page - Linear Technology LTM4615EVPBF Datasheet HTML 18Page - Linear Technology LTM4615EVPBF Datasheet HTML 19Page - Linear Technology LTM4615EVPBF Datasheet HTML 20Page - Linear Technology LTM4615EVPBF Datasheet HTML 21Page - Linear Technology LTM4615EVPBF Datasheet HTML 22Page - Linear Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 18 / 24 page
background image
LTM4615
18
4615f
APPLICATIONS INFORMATION
Safety Considerations
The LTM4615 modules do not provide isolation from VIN to
VOUT. There is no internal fuse. If required, a slow blow fuse
with a rating twice the maximum input current needs to be
provided to protect each unit from catastrophic failure.
Layout Checklist/Example
The high integration of LTM4615 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path,
including VIN, GND and VOUT. It helps to minimize the
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci-
tors next to the VIN, GND and VOUT pins to minimize
high frequency noise.
• Place a dedicated power ground layer underneath the
unit.
• To minimize the via conduction loss and reduce module
thermal stress, use multiple vias for interconnection
between the top layer and other power layers.
• Do not put via directly on pads unless the via is
capped.
Figure 11 gives a good example of the recommended
layout.
M
CIN1
GND1 CONTROL
GND2
SW2
GND1
VIN1
GND1
SW1
CONTROL
LD0_IN
GND3
GND2
GND2
GND2
GND3
GND1
LDO_OUT
VOUT2
VOUT1
VIN2
GND2
4615 F11
VOUT1
L
K
J
H
G
F
E
D
C
B
A
1
2
3456789
10 11 12
CIN3
COUT4 COUT5
COUT1 COUT2
COUT3
CIN2
Figure 11. Recommended PCB Layout



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com