LTC3577 datasheet(48/52 Pages) LINER

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LTC3577/LTC3577-1

3577f

OPERATION

The LTC3557 can be used above 20°C, but the charge

current will be reduced below 1A. The charge current at

a given ambient temperature can be approximated by:

PD =

110°C– TA

θJA

= VOUT –BAT

()•I

BAT + PD(REGS)

Thus:

IBAT =

(110°C − TA)

θJA

−PDREGS

VOUT –BAT

Consider the above example with an ambient temperature

of 55°C. The charge current will be reduced to approxi-

mately:

IBAT =

110°C– 55°C

45°C/W

− 0.3W

5V – 3.3V

IBAT =

1.22W – 0.3W

1.7V

= 542mA

If an external buck switching regulator controlled by the

LTC3577 VC pin is used instead of a 5V wall adapter we see

a signiﬁcant reduction in power dissipated by the LTC3577.

This is because the external buck switching regulator will

drive the PowerPath output (VOUT) to about 3.6V with the

battery at 3.3V. If you go through the example above and

substitute 3.6V for VOUT we see that thermal regulation

does not kick in until about 83°C. Thus, the external high

voltage buck regulator not only allows higher charging

currents, but lower power dissipation means a cooler

running application.

Printed Circuit Board Layout

When laying out the printed circuit board, the following

list should be followed to ensure proper operation of the

LTC3577:

1. The Exposed Pad of the package (Pin 45) should connect

directly to a large ground plane to minimize thermal and

electrical impedance.

2. The step-down switching regulator input supply pins

(VIN12 and VIN3) and their respective decoupling ca-

pacitors should be kept as short as possible. The GND

side of these capacitors should connect directly to the

ground plane of the part. These capacitors provide the

AC current to the internal power MOSFETs and their

drivers. It’s important to minimizing inductance from

these capacitors to the pins of the LTC3577. Connect

VIN12 and VIN3 to VOUT through a short low impedance

trace.

3. The switching power traces connecting SW1, SW2, and

SW3 to their respective inductors should be minimized

to reduce radiated EMI and parasitic coupling. Due to

the large voltage swing of the switching nodes, sensitive

nodes such as the feedback nodes (FBx, LDOx_FB and

LED_OV) should be kept far away or shielded from the

switching nodes or poor performance could result.

4. Connections between the step-down switching regulator

inductors and their respective output capacitors should

be kept should be kept as short as possible. The GND

side of the output capacitors should connect directly

to the thermal ground plane of the part.

5. Keep the buck feedback pin traces (FB1, FB2, and FB3)

as short as possible. Minimize any parasitic capacitance

between the feedback traces and any switching node

(i.e. SW1, SW2, SW3, and logic signals). If necessary

shield the feedback nodes with a GND trace.

6. Connections between the LTC3577 PowerPath pins

(VBUS and VOUT) and their respective decoupling ca-

pacitors should be kept as short as possible. The GND

side of these capacitors should connect directly to the

ground plane of the part.

7. The boost converter switching power trace connect-

ing SW to the inductor should be minimized to reduce

radiated EMI and parasitic coupling. Due to the large

voltage swing of the SW node, sensitive nodes such

as the feedback nodes (FBx, LDOx_FB and LED_OV)

should be kept far away or shielded from this switching

node or poor performance could result.

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