LTC1045CSW datasheet(4/20 Pages) LINER

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LTC1045

1045fc

VOH (Pin 1): High Level to which the Output Switches.

IN1 to IN7 (Pins 2 to 7): Six Comparator Inputs; Voltage

Range = V – to V – + 18V.

VTRIP2 (Pin 8): Trip Point for Last Two Comparators

(Inputs 5,6); Voltage Range = V – to V + – 2V.

VTRIP1 (Pin 9): Trip Point for First Four Comparators

(Inputs 1 to 4); Voltage Range = V – to V + – 2V.

V – (Pin 10): Comparator Negative Supply.

VOL (Pin 11): Low Level to which the Output Switches.

ISET (Pin 12): This has three functions: 1) RSET from this

pin to V – sets bias current, 2) when forced to V + power is

shut off completely and 3) when forced to V + outputs are

latched.

DISABLE (Pin 13): When high, outputs are Hi-Z.

OUT6 to OUT1 (Pins 14 to 19): Six Driver Outputs.

V + (Pin 20): Comparator Positive Supply.

PIN FUNCTIONS

TEST CIRCUITS

50%

10%

90%

10%

tOH

DISABLE

OUTPUTS

10pF

V+

DISABLE

10k

VOH

OUTPUT

1045 F03b

–5V

tOH

tr ≤ 10ns

50%

10%

90%

tIH

DISABLE

OUTPUTS

10pF

V+

DISABLE

10k

VOL

OUTPUT

1045 F03a

–5V

tr ≤ 10ns

tIH

–

50%

10%

90%

tACC

DISABLE

OUTPUTS

50pF

DISABLE

OUTPUT

1045 F03c

–5V

tACC

tr ≤ 10ns

Figure 3. Three-State Output Test Circuit

Conditions: V + = VOH = 5V, V– = VOL = 0V

–

VIN

VTRIP = 1.2V

V+

V–

VOL

VOH

OUTPUT

50pF

1045 F01

10%

tr = tf ≤ 10ns

90%

10%

VIN

OUTPUT

1.3V

1.2V

1.1V

2.5V

50%

1045 F02

VIN

ISET

100mV

VTRIP

VTRIP = 1.2V

VIN

–100mV

tHOLD

ISET

tSETUP

–

Figure 2. Latch Test Circuit

Figure 1. Response Time Test Circuit

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