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CXG7003FN bảng dữ liệu(PDF) 3 Page - Sony Corporation |
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CXG7003FN bảng dữ liệu(HTML) 3 Page - Sony Corporation |
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3 / 9 page ![]() – 3 – CXG7003FN Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 Symbol LOIN VDD (LO AMP) GND VDD (RF AMP) GND GND ANT1 ANT2 VCTL1 TX POUT CAP VGG PIN GND VDD1 VDD2 VDD3 GND RX VCTL2 RFIN CAP GND CAP IFOUT/VDD (IF AMP, MIX) Description Local signal input pin VDD pin of local amplifier GND pin VDD pin of RF amplifier GND pin GND pin Antenna switch pin. This pin is ANT1-Tx or ANT1-Rx by setting of VCTL1 and VCTL2. Antenna switch pin. This pin is ANT2-Tx or ANT2-Rx by setting of VCTL1 and VCTL2. Antenna switch control 1 pin Tx pin. Signal is input to antenna switch during ANT-Tx. Power amplifier output pin Connection pin of external capacitor (for noise elimination) Gate voltage adjustment pin of power amplifier (first stage, middle stage, rear-end FET) Signal input pin to power amplifier GND pin VDD1 pin of power amplifier (first stage FET) VDD2 pin of power amplifier (middle stage FET) VDD3 pin of power amplifier (rear-end FET) GND pin Rx pin. ANT input signal is output to this pin during ANT1-Rx or ANT2-Rx. Antenna switch control 2 pin RF signal input pin External capacitor connection pin. This pin is connected to LNA FET source. RF amplifier characteristic is optimized during 1.9GHz by the capacitor of 13pF (Typ.). GND pin External capacitor connection pin. IF amplifier distortion is improved by this capacitor. IF output and IF AMP, MIX VDD |
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