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SE97TP bảng dữ liệu(PDF) 5 Page - NXP Semiconductors

tên linh kiện SE97TP
Giải thích chi tiết về linh kiện  DDR memory module temp sensor with integrated SPD, 3.3 V
PDF  54 Pages
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SE97TP bảng dữ liệu(HTML) 5 Page - NXP Semiconductors

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SE97_5
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 05 — 6 August 2009
5 of 54
NXP Semiconductors
SE97
DDR memory module temp sensor with integrated SPD, 3.3 V
6.
Pinning information
6.1 Pinning
6.2 Pin description
Fig 2.
Pin configuration for TSSOP8
Fig 3.
Pin configuration for HXSON8
Fig 4.
Pin configuration for HVSON8
Fig 5.
Pin configuration for HWSON8
SE97PW
A0
VDD
A1
EVENT
A2
SCL
VSS
SDA
002aab805
1
2
3
4
6
5
8
7
terminal 1
index area
1
A0
SE97TL
002aad548
Transparent top view
2
A1
3
A2
4
8
7
6
5
VSS
VDD
EVENT
SCL
SDA
002aab803
SE97TK
SDA
A2
VSS
SCL
A1
EVENT
A0
VDD
Transparent top view
4
5
3
6
2
7
1
8
terminal 1
index area
terminal 1
index area
1
A0
SE97TP
002aad768
Transparent top view
2
A1
3
A2
4
8
7
6
5
VSS
VDD
EVENT
SCL
SDA
Table 2.
Pin description
Symbol
Pin
Type
Description
A0
1
I
I2C-bus/SMBus slave address bit 0 with internal pull-down. This
input is overvoltage tolerant to support software write protection.
A1
2
I
I2C-bus/SMBus slave address bit 1 with internal pull-down
A2
3
I
I2C-bus/SMBus slave address bit 2 with internal pull-down
VSS
4
ground
device ground
SDA
5
I/O
SMBus/I2C-bus serial data input/output (open-drain). Must have
external pull-up resistor.
SCL
6
I
SMBus/I2C-bus serial clock input/output (open-drain). Must have
external pull-up resistor.
EVENT
7
O
Thermal alarm output for high/low and critical temperature limit
(open-drain). Must have external pull-up resistor.
VDD
8
power
device power supply (3.0 V to 3.6 V); supports 1.7 V for
EEPROM read only.



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