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PCA2003 bảng dữ liệu(PDF) 5 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  32 kHz watch circuit with programmable adaptive motor pulse and pulse period
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PCA2003_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 21 July 2009
5 of 21
NXP Semiconductors
PCA2003
32 kHz watch circuit with programmable adaptive motor pulse
7.2 Step detection
Figure 5 shows a simplified diagram of the motor driving and step detection circuit, and
Figure 6 shows the step detection sequence and corresponding sampling current.
Between the motor driving pulses, the switches P1 and P2 are closed, which means the
motor is short-circuited. For a pulse in one direction, P1 and N2 are open, and P2 and N1
are closed with the appropriate duty cycle; for a pulse in the opposite direction, P2 and N1
are open, and P1 and N2 closed.
Fig 4.
Possible modulations for a 3.9 ms motor pulse
43.75 %
37.5 %
DUTY CYCLE
50 %
56.25 %
62.5 %
68.75 %
75 %
81.25 %
100 %
mgw351
0.244 ms
0.122 ms
0.98 ms
0.98 ms
0.98 ms
0.98 ms
Fig 5.
Simplified diagram of motor driving and step detection circuit
mgw352
VDD
VSS
MOTOR
MOT1
N1
P1
D1
RD
N2
P2
P4
P3
MOT2



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