TVP3703 datasheet(17/21 Pages) TI

17 / 21 page

TVP3703

VIDEO INTERFACE PALETTE

TRUE-COLOR CMOS RAMDAC

SLAS100 – MARCH 1996

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

operating characteristics

DAC

PARAMETER

TVP3703-170

TVP3703-135

UNIT

PARAMETER

MIN

TYP

MAX

MIN

TYP

MAX

UNIT

Resolution

bits

DAC operating frequency

170

135

MHz

Output current, black level pedestal (see Note 10)

0.95

1.44

1.9

0.95

1.44

1.9

Output current, white relative to black (see Note 10)

16.74

17.62

18.50

17.6

17.62

20.4

DAC-to-DAC matching (see Notes 10 and 11)

±2%

±5%

±2%

±5%

Integral linearity error (see Note 10)

±1

LSB

Differential linearity error (see Note 10)

±1

LSB

DAC output compliance (see Note 10)

–1

1.2

–1

1.2

DAC output impedance

Ω

Rise time (black to white level) (see Notes 10, 12, and 13)

Settling time (black to white) (see Notes 10, 12, and 14)

Glitch energy (see Notes 10 and 12)

pVs

Comparator trip voltage

340

Iref

Reference input current

100

µA

Internal reference voltage

1.235

Internal reference voltage accuracy

1.15

1.235

1.27

1.15

1.235

1.27

NOTES: 10. Vref = 1.235 V and RSET = 147 Ω

11. About the midpoint of the distribution of the three DACs

12. 37.5

Ω and 30 pF load

13. Measured between 10% and 90% of full scale transition.

14. Settling to within 2% of frame sync delay (fsd)

timing diagrams

tsu(SVL)

th(LSX)

td(RLQX)

ta(RLQV)

th(RHQX)

td(RHQZ)

tsu(DVWH)

th(WHDX)

WR, RD

RS0 – RS2

D0 – D7

(Read)

D0 – D7

(Write)

trec(RHRL), trec(WHWL)

tw(RLRH), tw(WLWH)

Figure 1. Micro Port Read/Write Cycle Timing

TVP3703 bảng dữ liệu(PDF) 17 Page - Texas Instruments

TVP3703 bảng dữ liệu(HTML) 17 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21

bảng dữ liệu tải về

Link URL