May 2008

PCS1P2859A

rev 0.2

Multi-Output Clock Synthesizer

2 of 7

Notice: The information in this document is subject to change without notice.

Pin Diagram

Pin Description

Pin #

Pin Name

Pin Type

Pin Description

1

127MHz

Output

127MHz Clock Output

2

VDD

Power

Connect to +3.3V

3

AGND

Power

Connect to ground

4

CLKIN / XIN

Input

External reference Clock or Input Crystal connection.

5

XOUT

Output

Connection to crystal. If using an external reference clock, this pin must be

left unconnected

6

REFOUT

Output

25MHz Reference Clock output

7

48MHz

Output

48MHz Clock Output

8

48MHz

Output

48MHz Clock Output

9

127MHz

Output

127MHz Clock Output

10

33MHz

Output

33MHz Clock Output

11

GND

Power

Connect to ground

12

NC

No connection

13

NC

No connection

14

AVDD

Power

Connect to +3.3V

15

48M_ENBLB

Input

48MHz Output Enable bit. When this pin is made LOW, the 48MHz clocks

are enabled.Tri-states 48MHz clocks when this pin is HIGH

.

16

SHUTDOWNB

Input

Output Enable bit. When this pin is made HIGH, all clocks are enabled.

Tri-states all clocks when this pin is LOW

.

SHUTDOWNB

48M_ENBLB

NC

NC

GND

33MHz

127MHz

48MHz

48MHz

REFOUT

XOUT

CLKIN/XIN

127MHz

AVDD

VDD

AGND

PCS1P2859A

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16