November 2006

ASM5P23S04A

rev 1.4

3.3 ‘SpreadTrak’ Zero Delay Buffer

3 of 15

Notice: The information in this document is subject to change without notice.

1

2

3

4

REF

CLKA1

CLKA2

CLKB1

CLKB2

GND

FBK

ASM5P23S04A

8

7

6

5

Pin Configuration

Pin Description for ASM5P23S04A

Pin #

Pin Name

Description

1

REF

1

Input reference frequency, 5V tolerant input

2

CLKA1

2

Buffered clock output, bank A

3

CLKA2

2

Buffered clock output, bank A

4

GND

Ground

5

CLKB1

2

Buffered clock output, bank B

6

CLKB2

2

Buffered clock output, bank B

7

3.3V supply

8

FBK

PLL feedback input

Notes:

1. Weak pull-down.

2. Weak pull-down on all outputs.